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CHAP. 5]



The circuit of Fig. 5-49 has an infinite input resistance, employs resistors within ordinary range, and uses three op amps.


Show that in the circuit of Fig. 5-50 i1 ¼ i2 , regardless of the circuits of N1 and N2 .

Fig. 5-50 Nodes A and B are at the same voltage vA ¼ vB . Since the op amp draws no current, i1 and i2 flow through the two resistors and KVL around the op amp loop ABC gives Ri1  Ri2 ¼ 0. Therefore, i1 ¼ i2 .


Let N1 be the voltage source v1 and N2 be the resistor R2 in the circuit of Fig. 5-50. input resistance Rin ¼ v1 =i1 .

Find the

From the op amp we obtain vA ¼ vB and i1 ¼ i2 . From connections to N1 and N2 we obtain v1 ¼ vB ¼ v2 ¼ vA and v2 ¼ i2 R2 , respectively. The input resistance is v1 =i1 ¼ i2 R2 =i2 ¼ R2 which is the negative of the load. The op amp circuit is a negative impedance converter.


A voltage follower is constructed using an op amp with a finite open-loop gain A and Rin ¼ 1 (see Fig. 5-51). Find the gain G ¼ v2 =v1 . Defining sensitivity s as the ratio of percentage change produced in G to the percentage change in A, find s.

Fig. 5-51 From Fig. 5-51 we have v2 ¼ Avd .

Applying KVL around the amplifier, obtain

v1 ¼ vd þ v2 ¼ vd þ Avd ¼ vd ð1 þ AÞ ¼ v2 ð1 þ AÞ=A G¼

v2 A ¼ v1 1 þ A