can perform 50 times better than circuits fabricated on 7-nm nodes using planar integration. Furthermore, another program will investigate new materials coupled with architectures that rethink the flow of data between processors and memory to provide new solutions for processing the growing volume of scientific, sensor, social, environmental, and many other kinds of data.
Architectures “The availability of large functions, combined with functional design and construction, should allow the manufacturer of large systems to design and construct a considerable variety of equipment both rapidly and economically.” – Gordon Moore, 1965 The relentless pace of Moore’s Law ensured that the generalpurpose computer would be the dominant architecture for the last 50 years. When compared to performance gains achieved under Moore’s Law, exploring new computer architectures and committing the years of development and hundreds of millions of dollars required to do so just did not make economic sense. As this trend starts to slow down, however, it is becoming harder to squeeze performance out of generalized hardware, setting the stage for a resurgence in specialized architectures. Imagining what the future would look like, Moore suggested a framework for delivering specialized architectures by focusing on “functional design and construction” that would lead to manufacturable systems that also make economic sense. In other words, he was envisioning flexible architectures that can take advantage of specialized hardware to solve specific computing problems faster and more efficiently. Last year, DARPA started the Hierarchical Identify Verify Exploit (HIVE) program to explore the optimization of a specialized integrated circuit that could analyze the various relationships between data points in large-scale datasets, such as social media, sensor feeds, and scientific studies. Working with industry partners such as Qualcomm and Intel, the HIVE program aims to develop a specialized integrated circuit capable of processing large-scale data analytics 1,000 times faster than current processing technology. This advanced hardware could have the power to analyze the billion- and trillion-edge datasets that will be generated by the Internet of Things, ever-expanding social networks, and future sensor systems. While HIVE is an example of current progress, it will take much more innovation to bring Moore’s vision of specialized hardware to fruition. One of the key challenges to employing more specialization is the tension between the flexibility of general-purpose processors and the efficiency of specialized processors. If designers find specialized hardware too difficult to use or program, they are likely to forgo the efficiencies the hardware could deliver. The two new ERI Architectures programs seek to demonstrate that the trade-off between flexibility and efficiency need not be binary. These programs seek to develop methods for determining the right amount and type of specialization while making a system as programmable and flexible as possible. One of the programs will investigate reconfigurable computing architectures and software environments that together enable
data-intensive application performance near that of single application specialized processing implementations without sacrificing versatility or programmability. The resulting capabilities will enable the real-time optimization of computational resources based on real-time introspection of incoming data. The program will realize processing performance 500-1,000 times better than stateof-the-art, general-purpose processing and provide applicationspecialized processing performance while maintaining flexibility and programmability. The second program under the Architectures pillar of ERI will explore methods for combining a massive number of accelerator cores. Although accelerator cores can perform specific functions faster and more efficiently than is possible in software running on a generalpurpose processor, programming and coordinating applications on many heterogeneous cores has been a big challenge. One solution is to take a vertical view of the computing stack, which cross-cuts from the application software to the operating system and all the way down to the underlying hardware. By exploring the concept of a domain-driven approach to identify the appropriate accelerators; working on better languages and compilers to optimize code for these accelerators; and implementing intelligent scheduling for the applications running on such a complex processor, this program is looking at a new concept in customized chips that can rapidly utilize myriad accelerators to address multiple applications.
Toward a More Innovative Future The gains that came from Moore’s Law were not guaranteed, but realized through ingenuity and close collaboration between commercial industry, academia, and government. Today, the rising cost to design integrated circuits, increasing foreign investments, and the commodification of hardware threaten the future health of an innovative and dynamic domestic microelectronics community. Facing these challenges, the Electronics Resurgence Initiative will build on the long tradition of successful government-industry partnerships to foster the environment needed for the next wave of U.S. semiconductor innovation.
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