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Printable Memory Thinfilm's printable memory labels are as thick as a human hair.

PCB Thermal Management

New Challenges for Small PCBs

Jennifer Ernst

Executive VP of Sales & Business Development for Thin Film Electronics ASA

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Modern Printed Circuits









Small PCBs Encounter New Challenges

Switch Debouncing for Electronic Product Design

Jennifer Ernst: Executive VP of Sales & Business Development for Thinfilm

~ ~ ~

PCB Thermal Management Requires Special Considerations


Modern Printed Circuits

Small PCBs Encounter New Challenges

Advanced technologies on those boards are forcing designers, fabricators, and assembly houses to re-examine traditional techniques and apply new ones.



Small, carry-along devices in all market segments continue to be produced in the millions. Market researchers say there does not appear to be a slow down any time soon for this escalating growth. This tremendous growth is led by consumer smartphones and tablet PCs, but these models are the basis for similar products in the mil/aero, industrial, healthcare, education market segments, as well the newer emerging markets for these handy devices. PCBs are at the heart of these small devices. As you would expect, these small boards are loaded with the most recent technologies available. The technologies packed into those ever-shrinking PCBs provide the extra electronics critical for powering all the features and functions the end user demands. Those user demands, in turn, present major challenges to PCB designers, fabricators, and assembly houses.


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FIGHTING OFF THE HEAT Dissipating excessive heat is among the top challenges. But first you have to consider that the smaller PCB real estate available to the designer offers little space for laying out a design packed with an enormous amount of powerful functionality. Chipmakers and component manufacturers are making their contribution in this regard by housing their highly integrated silicon chips in smaller packaging such as fine-pitch BGAs and CSPs, as well as micro BGAs and micro CSPs as shown in Fig. 1. That way, a small PCB can be populated with more powerful devices. Meanwhile, to conserve space on a board, PCB assembly equipment manufacturers are coming forward with systems that automatically place one package on top of another, also known in the industry as package-on-package or PoP. Increasingly, PCB designers working on these small form factor designs have no other alternative than to exercise PoP to achieve performance goals the OEM has set forth. All this brings us back to heat dissipation. Considerable heat is being generated in these small areas, and it has to be dissipated; otherwise, too much heat damages the electronics. As part of their thermal management strategies, PCB designers have a choice of methods for cooling hot devices. At the same time, heat sink manufacturers are offering their newer innovations to help get the heat out. Figure 1


In the case of stacked die or PoP thermal performance, it is best for the larger chip to be at the bottom. Normally, this is the BGA-packaged memory chip with the BGA-packaged microprocessor (ÂľP) or microcontroller (ÂľC) chip at the top.

TECH ARTICLE The larger or memory chip performs as a heat spreader to dissipate the heat to the BGA’s solder balls and onto the board, itself. The future holds even more difficult thermal as PoP goes up and adds one more package for a triple-layer version. This solution barely scratches the surface of thermal issues. There are other thermal challenges as well that the designer, fabricator, and assembly houses must deal with. Thermal issues present only one aspect of the problematic areas PCB design and assembly houses face. It’s important to note that new and different techniques used at design layout for these smaller boards have cost, manufacturing, and testing effects when they’re fabricated and assembled. At PCB layout, signal routing presents a major design challenge. There is little space left on the board for signal routing once its crammed with many complex devices. When space is severely limited with little to no room to run traces from point A to point B, either on top or bottom, then the number of layers must increase to accommodate this routing. In other words, the cost of fabricating these boards goes higher. Also, rather than using traditional six mil signal traces, small mobile technologies require three to four mil traces. This means finding a fabrication house qualified to successfully fabricate a PCB with three mil traces. The PCB fabrication house must also be UL certified for performing that fine caliber of trace without much fallout. Techniques to implement blind and buried vias must be used for making mobile /handheld devices due to the smaller PCB real estate. This, in turn, limits the number of fabrication houses that can build these types of products. Smaller board size also means smaller via sizes. When using a smaller via, smaller diameters and pad sizes are required. For example, instead of the regular 10 mil pad around a via hole, the designer must use a five or six mil pad. With tight tolerances for drilling, there is not much room for error. If pads aren’t precisely drilled, half moons or breakaways usually occur, and reliability becomes an issue.

“To conserve space on a board, PCB assembly equipment manufacturers are coming forward with systems that automatically place one package on top of another, also known in the industry as package-on-package or PoP.” FINE PITCH BGAS Chipmakers are also making their packaged devices with an even finer pitch. Pitch is the distance or space between the center of one BGA ball to the center of the next one. That’s yet another way to add more BGA ball connections to increase the functionality on a small board. Most smartphones today use 0.4 millimeter (mm) pitch BGAs, and 0.3mm ultrafine pitch BGAs represent the next generation. Design challenges come about because a majority of PCB designers are still working in the 0.5mm pitch and above arena and will eventually transition their efforts into the finepitch era. Design rules and guidelines are quite different between 0.5mm and above and fine pitch.


Modern Printed Circuits

Figure 2

“Since PCB real estate is at a premium, components are placed extremely close to each other and to the board’s edge, thus posing assembly challenges.”

The next OEM phase will be to increase product functionality within basically the same small PCB area. This is where 0.3mm pitch BGAs will be used. Unfortunately, those designers transitioning from 0.5mm pitch may unknowingly rely on those rules and guidelines as they move into 0.3mm pitch. They’ll have a rude awakening and face certain particular design issues that’ll spill over to fabrication and assembly.

FABRICATION Board surface finishes are among the foremost considerations for an efficient PCB during board fabrication. Normally gold is used due to its high reliability. Plus, it has more shelf life, and soldered joints are considerably sturdier compared to hot-air solder leveling (HASL) or organic solderability protectants (OSP) finish. Selecting the right panel size falls into a fabrication house’s planning department. For example, consider a small 25 square inch board to be used in a mobile technology product. A relatively high number of this small board can be panelized into an 18×24-inch panel.



But an experienced planner may choose to use only a 9×12-inch panel size due to board complexity and density, as well as such factors as high-speed signals and controlled impedance calculations. That’s why an experienced planner is critical at the fabrication house to review and verify the data before the board actually goes into fabrication process. This ensures a high yield at the fabrication process, which can make the whole manufacturing process run smoothly.

ASSEMBLY Since PCB real estate is at a premium, components are placed extremely close to each other and to the board’s edge, thus posing assembly challenges. For instance, a component protruding outside the board makes it difficult to effectively deploy pick and place machine. This means that precise pick and place equipment should be used for assemblies requiring accurate placements. How best to use fixtures is another important assembly aspect. The reason is small PCBs may not be traditionally rectangular in shape, Fig. 2. They could be oval, L-shaped, or other unusual shape. Due to these odd shapes, SMT, wave, and test fixtures can be used. This permits these machines to be used optimally when multiple boards are assembled or tested in a panel at one time. The result is considerable time savings and costs associated with assembling one board at a time. Smart fixtures are ideal for small form factors PCBs. Normally, two fixtures are designed, one for the top, another for the bottom of the PCB. Instead, one fixture could be devised for both top and bottom, whereby top and bottom assemblies are used within one fixture. This means throughput is increased for greater efficiency, while time and cost are reduced to half. Instead of using six, for example, three would suffice to finish off the assemblies. Testability during assembly is another critical aspect due to extremely close component population on a small board. This means there is virtually little room for placing test points or access nodes on the board. Traditional testing

techniques cannot be applied. Instead, advanced test techniques are used, thus reducing the number of test points needed to test the complete functionality of the board. During assembly, these small PCBs also require automatic optical inspection (AOI) deployment procedures. In extreme cases, back-to-back components may hinder or completely eliminate AOI usefulness because it cannot read all critical numbers and figures that are etched on the body of the components. Also, since components are placed back to back without much room, it creates challenges for probing the vias and test points during the flying probe testing. That’s because accessing different parts of the boards become virtually impossible. As far as I/O communications, the traditional approach is to use through-hole connectors. They are easy to assemble, plug in, and test, and inexpensive to procure. But with small PCBs, they make assembly challenging, costly, and time consuming since traditional through-hole connectors cannot fit in small cell phones or other similar devices. Therefore, SMT connectors are used. They are costly and difficult to assemble. Plus, assurances must be made that surface finish is gold and not HASL or OSP. Once a cable or ribbon is put on an SMT connector, it is on for good. If it needs to be taken off, de-soldering needs to be performed, as well as the use of special tools. ■

PHOTO SOURCES Fig. 1: Larsen Associates Fig. 2:

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Modern Printed Circuits

Switch Debouncing for Electronic Product Designs by Cameron Burge Hardware Engineer, Nuvation Engineering

“What is switch debouncing and why is it needed?�


e press mechanical buttons hundreds of times a day on our cellphones or computer keyboards, and we take for granted that the desired action occurs imperceptibly quickly and only once. This behavior only occurs because of good engineering practices where mechanical switches are debounced. What is switch debouncing and why is it needed? When a common mechanical push-button switch is pressed two electrical contacts are forced together forming a low impedance path for current to flow. The problem that arises is that the contacts do not go from a state of no contact to contact cleanly. The contacts rub against each other and bounce off each other several times before coming to rest against each other.

Pushbutton Switch Circuit and Voltage Waveform


A common switch topology is shown to the left, along with the resulting voltage waveform that is produced when the switch is pressed. This switch completed essentially all bouncing

TECH ARTICLE after only 100 microseconds, but other types of switches can bounce for many tens of milliseconds. A fast processor sampling the switch waveform would see several transitions even though the user only pushed the button once. Switch debouncing in an electronic design ensures that the device that is sampling the switch waveform does not misinterpret a single button press as many. There are many different ways to accomplish switch debouncing in both hardware and software. The best debouncing solution depends on numerous factors such as the application’s cost, size, processing power, environment, and type of switch. Several common debouncing schemes are introduced below. RC Filter Debouncing One of my favorite debouncing techniques is using a RC filter, as shown below. The RC filter slows down the signal transitions generated by the switch so the each button press gives one slow edge. It is usually best to follow the RC filter stage with a Schmitt trigger buffer. Although this is a high part count solution to debouncing, it offers a lot of flexibility. The RC filter is easy to tune, which can be useful if the pushbutton is located off board and the button type is unknown. It is also easy to add level translation, ESD protection, and overvoltage protection to this circuit with just a few additional parts. Integrated Circuit Solutions Another way to debounce switches in hardware is to take advantage of applicationspecific integrated circuits. Semiconductor manufacturers such as Maxim Integrated offer switch debouncers like the MAX6816 in very small packages, with built-in ESD protection. These parts cost a few dollars, depending on the purchasing volume. Although they are extremely easy to use, they are more expensive and offer less flexibility and customization than designing your own RC filter. Software Counter If you’d prefer to debounce a switch with software, one of the most basic methods is the counter method. The idea is to sample the switch’s waveform at periodic intervals, such as once every millisecond. Every time the sig-

Pushbutton Switch Circuit and Voltage Waveform

nal is sampled in the active state the counter is incremented, and otherwise the counter is cleared. Once the counter reaches a certain threshold the switch is considered to have been pressed. Since the debounce time becomes the product of the sampling period and the counter threshold, it is easiy to adjust. Software Shift Register Switch debouncing can also be accomplished in software by using the shift register method. Similar to the counter method, the switch’s waveform is sampled at periodic intervals. The sampled state is then clocked into a shift register. The contents of the shift register are compared to a set pattern or hexadecimal value to determine whether the button is depressed. The hexadecimal value can be used to adjust the debounce time. For example, if the value 0xF000 is compared to the contents of a sixteen bit shift register, only 12 subsequent zeros need to propagate through the shift register. The shift register method is also well suited for use in FPGAs. These methods should give you some ideas for how to implement switch debouncing for your next electronic product design. They should also give you a whole new appreciation for what goes on the next time you adjust the volume on your car stereo! Cameron Burge is a Hardware Engineer at Nuvation, a design firm that takes new electronic products from concept to volume production.


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Modern Printed Circuits


Printable Circuits

Interview with Jennifer Ernst Executive VP of Sales & Business Development for Thin Film Electronics ASA

Thin Film Electronics ASA is an innovative company that specializes in printing integrated electronics, beginning with rewritable memory. Thinfilm was the first to create this type of technology and is currently creating printable circuits that will include memory, sensing, display, and wireless communication. This technology can add rewritable data to any object, which has the potential to change the entire electronic product industry. We spoke with Jennifer Ernst, Executive VP of Sales & Business Development for Thinfilm, about the printable circuit technology, some of the unique applications they envision for it, and the company’s plan for global expansion.




Modern Printed Circuits

“Thinfilm works with our customers and partners to understand market needs and then develop system designs tailored to their specific needs.”

How did you come into this position and what are the roles that you are currently focusing on? Prior to joining Thin Film ElectronicsASA about two and a half years ago, I was at PARC, a Xerox Company, for about 20 years. My focus was on business development for various programs in Electronic Materials and Devices. One of the teams that I worked with was the printed electronics group. Significant work had been done at PARC on organic, printed logic. Thinfilm and PARC began working together in 2010. It was in that development relationship that I first met Thinfilm and saw the tremendous potential in bringing together PARC’s work in printed logic with Thinfilm’s core technology in printed memory. I joined Thinfilm in 2011 as Executive Vice President of the sales and business development activities of the organization.

Can you tell us about the partnership of Thinfilm Electronics and PARC? This partnership was an opportunity to begin commercializing printed electronics. Each partner brought about 15 years of background in this field. Thinfilms’ expertise is in printable memory products, PARC’s is in printing logic.


Once we began marrying logic and memory on printed circuits, everything else is almost like adding a peripheral. We are connecting sensors, displays, and soon NFC into the circuits, to make simple sensor systems able to store small bits of data at very low costs. The collaboration with PARC continues and they are now among our top 30 shareholders.

What makes this technology appealing? It’s the cost-per-function profile. For example, on our website, you can find a demonstration of an electronic sensor label that monitors temperature and tells a user if a temperature excursion has occurred. We are targetting a market entry price of 3050¢. We have just acquired the leading company in printed NFC and will integrate that functionality to communicate data from labels to smart phones and tablets. For comparison, conventional electronic systems in this market are $11-$25 on up. Our systems are close to the price point of color changing temperature labels, but will be able to deliver higher functionality. Initially by being able to track multiple exposures, and then by adding the NFC communication, so data can be used by Apps and in services.

COVER INTERVIEW What is the current state of this technology and when will it be commercially available? On our web site, you can see rolls of our printed memory, which is our current product. We are getting orders for this right now for applications in brand protection, and are working with some of the major toy companies to qualify for product. The first integrated system products, containing sensing and display, will be available in sample quantities by end of year.

product lines. Our initial work together will focus on electronic timing labels for applications in visitor and healthcare identification and tracking. Our first commercial order is with an international luxury goods company, who will begin using our Brand Protection Solution in Q1 2014, as part of its next major product release. The solution will provide product authentication and assist in tracing grey market activity.

Thinfilm’s printed temperature sensor

We also just announced that we acquired the industry’s only printed NFC technology, originally developed by Kovio, Inc. We have acquired all Kovio technology for both NFC and Electronic Article Surveillance, over 200 international patents, and a manufacturing facility with capacity of a few hundred million units per year.

Are these bi-stable displays? The ones shown in our demonstrations are not; they are a very inexpensive electrochromic display that is semi-bi-stable. However, our designs are compatible with displays like those from E Ink. We can choose different display media depending on the application.

How does Thin Film work with its customers? Thinfilm works with our customers and partners to understand market needs and then develop system designs tailored to their specific needs. We have been focusing primarily on strategic partnerships. For example, we have a partnership with the Bemis Company, which is one of the largest flexible packaging manufacturers in the world. We’re developing intelligent packaging solutions as well as brand protection applications in flexible packaging and beverage labeling. We also have a partnership with Hasbro. Toys are one of the first target applications for our memory-only labels. Most recently we announced a strategic alliance with Brady, an international manufacturer of solutions that identify and protect premises, products and people, to bring our technology to the company’s identification


Modern Printed Circuits What is the biggest challenge in moving printed electronics closer to what traditional silicon-based electronics are capable of? It’s important to note that we really aren’t tryng to move closer to traditional electronics. That’s been one of the failure points in the printed electronics industry – trying to displace conventional technologies that have a 60 year headstart. For comparative purposes, we are at about the same level silicon was in around 1969. Instead, we are using printed electronics to address markets that are too cost-sensitive for conventional electronics.

“The technology is positioned to offer an alternative between colorchanging temperature labels, at one end of the market, and elecronic data loggers that are 10-20x the price.”

To commercialize printed electronics, many pieces have to come together, from the materials level to the processes used for printing and curing inks. From commercializing the printed memory, we have significant experience printing fine lines and thin films. We are showing good yields in the printing process in volume production. Now we’re moving that know-how into the print processes for the transistors.

Do you still heavily invest in research, or are you now focused on transitioning to applications? We are much more focused on the applications than on basic research. Our partnership with PARC is really about leveraging the 15 years of research that they have already done. We do work with a number of research institutions, like PARC and Acreo, but we focus on the product side--creating something that customers can place orders for.

What can you tell us about some of the products that we will be seeing in the next years? Obviously, our printed memory is the first thing, as that’s in market and shipping today. The first thing you will see in our system products—those that contain additional functionality such as sensors and/or displays—will be simple systems like a timer label or temperature indicator. The temperature sensor label that we are developing is used for monitoring shipments


COVER INTERVIEW of perishable goods, such as pharmaceuticals and food shipments.The technology is positioned to offer an alternative between color-changing temperature labels, at one end of the market, and elecronic data loggers that are 10-20x the price. Even today, WalMart mandates certain temperature monitors in the shipment of the food that comes to its stores. With traditional electronics, the lowest cost system that can do that kind of temperature monitoring is about $5; the ones that are usually used are $11 and up. Compare that to a target of 30-50¢. Our first generation of products is memoryonly. The second generation, by year end, will be integrated systems containing memory, sensing and display. The third generation products will be NFC-enabled labels. This means near-field communications that are able to pull the data off the label using smart phones and tablets. Even if you can get a color-changing label on a chemistry-based system to give you an indication, the thing that it can never do is to transfer the data electronically to something else.

Can you elaborate more on some sensor applications? We’ve recently completed a project funded by FlexTech for blood oxygen sensors. A program in ammonia sensors is also being funded by FlexTech this year. There are humidity sensors as well as different types of light sensors.

How are you going to promote this technology in the global market? Yes, I already have teams in place in Japan, EU and North America. Globally, there is a growing interest in printed electronics. UK, Canada, Korea, Japan, Germany, European Union all have major programs in this area. There has also been a long investment in printed electronics in Sweden where our research and development site is located. In the US, FlexTech, the US National Consortium for flexible and printed electronics, is starting a dedicated users’ group forum for disposable electronics based on printed electronics.

What do you think about flexible electronics? There are many ways to get flexibility. Most of them result in a more expensive circuit. In Thinfilm’s case, what we were going after is not flexibility, per se, but low-cost. Flexibility comes as a necessity for the printing process, but it isn’t the prime objective

Is there any trending topic that will drive this technology over the next couple of years and where you’re expecting to go? Yes, there’s a huge trend towards the Internet of Things (or Internet of Everything). Stanford hosted a ‘trillion sensor’ conference in October. Gartner cites “Internet of Things” as one of the top 10 strategic trends of this decade. Analysts and companies alike are predicting markets in the trillions of dollars by 2020—Gartner $1.9 trillion, IDC $8.9 trillion, Cisco $19 trillion. Industry giants such as Intel, IBM, Cisco, Qualcomm and NXP are placing major bets on IoT, and the San Jose Mercury News calls IoT a technological transformation “as profound as the Industrial Revolution.” Predictions for the number of sensor systems needed range from 10s of billions to trillions. Those numbers just can’t be achieved in conventional electronics. A paradigm shift is required, and we believe that’s printed electronics. Low-cost, disposable sensor labels—able to autonomously collect information to later be read—are going to be key in this explosiong. With over 400 million NFC-enabled smart phones already deployed, a number projected to grow to 1 billion by 2015, linking ubiquitous sensors on Thinfilm Smart Labels with the mobile platform creates a fluid and agile alternative to traditional data infrastructures. It is this agile network that will truly launch the Internet of Everything. That’s why I’m particularly excited about the work we’re doing at Thinfilm. ■




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PCB Thermal Management Requires Special Considerations

Managing heat means more than choosing the right heat sinks. Newer, more advanced PCB technologies demand closer thermal analysis and actions.



A top assignment a PCB designer is responsible for is to manage the heat generated by today’s large and small complex electronics components placed on a PCB. In effect, the PCB designer becomes a thermal manager. The job in this instance focuses on effectively dissipating heat generated by high-power designs, high thermal conductivity, and on maintaining low coefficients of thermal expansion (CTE), while managing CTE mismatches between components, their interconnects, and the PCB, itself. The list of design key considerations is daunting enough, and it keeps growing with the challenges new packaging and advanced device technologies present. The following are the most prevalent design considerations:

• Selecting the proper heat sinks and attachment process. • Properly distributing analog circuitry throughout the board. • Effectively using ground pour on the PCB. • Strategically applying thieving, when possible. • Creating more solid planes for transfer of heat. • Thermal emphasis on LEDs


Modern Printed Circuits

Use Proper Heat Sink The purpose of a heat sink is to conduct heat away from the thermal generating devices to other sections of the silicon and then on out to the ambient. The more efficient heat sinks provide greater capacity to spread the heat out. The higher the thermal conductivity translates into a higher rate transfer. Consequently, when a heat sink with lower thermal conductivity is chosen, it wonâ&#x20AC;&#x2122;t dissipate as much heat compared to one with a conductor demonstrating a higher thermal conductivity. Heat sinks are made of extremely high thermally conductive materials such as aluminum and copper. Heat sinks with fins are even more effective to further push heat to the ambient, as shown in Figure 1. As an added bonus, the seasoned PCB designer factors in another thermal management touch by over-specifying a heat sink by at least 15 to 20 percent. This extra insurance helps to minimize or eliminate issues introduced by harsh or rugged conditions the product undergoes.

Figure 1: Heat Sink with Fins


As part of the design process, the PCB designer places special emphasis on the interface between the heat sink and the associated component or to the board itself because it is critical for effective thermal transfer. Normally, thermally-conductive and aluminum-filled epoxy is used for bonding the fins of the heat sink to the component or to the board. Itâ&#x20AC;&#x2122;s important that the right kind of alloy or substrate is used for attaching those heat sinks. Extra effort is necessary here for making the right calculations and the correct level of aluminum or copper content within the epoxy and alloy substrate. The substrate material connects the heat sink to the related device on the PCB. Tackling Analog and LED Heat A PCB populated with operational amplifiers (op amps), data converter, power amplifiers, and other types of analog ICs, as well as LEDs, can be highly challenging to a PCB designer. Analog signals carry heavy loads of current, as well as high voltages. When this current passes through physical conductors, it creates considerable heat. Thermal issues are further aggravated when certain standalone analog devices like op amps are in smaller packaging like small outline integrated circuit or SOIC, which is a surface-mounted IC package. As package size becomes increasingly smaller, much less power is capable of being removed. Since the lead frame is the only heat sinking possible with these small packages, their thermal performance is thus reduced. Moreover, increasing integration of analog functions on a system-on-a-chip (SoC), for example, continues to escalate the need for greater thermal dissipation.

TECH ARTICLE As an initial step in the design process, analog circuitry must be partitioned in its own section of the PCB not only due to the heat it generates, but also because it is noisier than digital circuitry. The idea here is to distribute the analog circuits on the PCB surface in order to eliminate thermal concentration in a particular area. Ground pour can be a next step if the circuitry allows it.The process deals with pouring copper on the unused surface area of the PCB. In effect, copper is spread through which heat can be dissipated. Instead of using one small surface mount (SM) pad for thermal dissipation, the PCB designer now increases the surface of the board, for example, to a half-inch by half-inch pour surface area. This ground pour area is then able to considerably dissipate the heat faster compared to what the SM pad can do alone. Thieving and metal core boards are two other methods a veteran PCB designer uses for thermal management. Thieving has dual purposes. Itâ&#x20AC;&#x2122;s used to distribute copper on a board to improve the etching process. But it also increases thermal dissipation because now there is more copper area. As a result, the expanded copper area can dissipate the heat from the main section or sources into the air using those extra, yet non-functional copper pads. As for the metal core board or MCPCB, a base metal material is used as a heat distributor and is an integral part of the main PCB, as shown in Figure 2. A single layer MC PCB provides a highly thermally conductive base material for spreading heat. The PCB designer also checks to determine if he or she can create solid planes as a way to reduce thermal challenges and increase heat dissipation. A board with a number of planes allows greater heat dissipation through those planes, although they are sometimes internal lanes and not in direct contact with the ambient temperature. Still, solid planes provide increased surface area to dissipate heat.

Figure 2: Metal Core PCB

A board with a number of planes allows greater heat dissipation through those planes, although they are sometimes internal lanes and not in direct contact with the ambient temperature.


Modern Printed Circuits

LEDs LEDs by their very nature create considerable heat.Special thermal management in these instances needs to be applied to properly dissipate this heat. In this case, the experienced PCB designer understands that he or she is dealing with special considerations not only at the design phase, but also at board fabrication and assembly. But itâ&#x20AC;&#x2122;s also worth noting that LED manufacturers, themselves, have made significant technical advances to reduce the thermal energy LEDs generate. While these newer heat reducing technologies are major contributors, these devices continue to generate ample thermal energy. Therefore, it falls on the contract manufacturer (CM) and EMS provider to apply their know how to dissipate this thermal energy.

Thatâ&#x20AC;&#x2122;s one reason the design stage is highly critical because if certain aspects are overlooked due to inexperience or by mistake, the thermal energy will encounter barriers to successful dissipation. Consequently, luminous output degrades, efficiency is significantly reduced, and the LED has a high probability of incurring adverse effects due to damage to the chip. The PCB designer should be knowledgeable enough to understand the various techniques critical in managing LED thermal energy. Those techniques include choosing and designating the proper heat sinks and attachment process, and using thermally conductive grease when applicable. Others are using ground pour, thieving, metal core boards when applicable, and creating additional solid planes for heat transfer, as mentioned above, and thermal vias.

During LED PCB handling, itâ&#x20AC;&#x2122;s important for the board to be sufficiently cooled down to room temperature before exerting mechanical or vibration pressures, such as re-aligning LEDs. Figure 3: LED PCB


TECH ARTICLE Thermal or conductive vias are designed on a PCB to move thermal energy from the PCB’s component side to its solder side and then efficiently distribute it. In this instance, more than 50 thermal vias should be used each with 0.3 to 0.5mm diameters on the copper pad area connecting the upper and lower copper pad. The PCB designer can play a role at fabrication, as well, by assuring certain techniques are used for LED thermal management. Conventional FR4 PCB surface finish combined with thermal vias is accepted for LED PCB thermal dissipation. In addition to copper thieving and ground pour, creating small islands of exposed copper on the board without a solder mask can serve as a heat sink. Carbon composite material used the ground planes of a PCB also helps thermal dissipation. It improves in-plane thermal conductivity with its three to six parts per million per degree centigrade (ppm/°C) CTE. This material compares favorably to traditional epoxy-glass and polyimide-glass-based materials with in-plane CTEs ranging from 15 to 20 ppm/°C. It serves as a built-in heat spreader and moves heat away from a hot spot to cooler areas of the PCB. Since it is located close to the PCB’s surface, there is a short thermal path from the heat source to this material. This material then enables heat to move from the heat source to the nearest carbon composite layer and from there to the chassis via mounting holes or wedge locks and then to the ambient. During Assembly During LED board handling, inspection, and test, the CM or EMS provider must ensure all general manufacturing techniques are applied. However, another key step is critical. That key step is to make certain unnecessary stresses aren’t applied to an LED package. For example, during LED PCB handling, it’s important for the board to be sufficiently cooled down to room temperature before exerting mechanical or vibration pressures, such as reworking/re-aligning LEDs. Otherwise, chances are it’ll break and require replacement.

As a general rule, an LED shouldn’t be used multiple times because of probable damage during re-solder. Also, at re-work, as a general rule, an LED shouldn’t be used multiple times because of probable damage during re-solder. When clamping it during soldering, the LED shouldn’t be subjected to mechanical stress and when picking up or depositing an LED on a PCB, it should be performed in a careful, smooth fashion with no external forces applied. At the end of the assembly process, an LED check test should be applied to each PCB to ensure all necessary assembly steps have been correctly performed. Electrical tests designed to screen out design for test (DFT) failures should be performed only at final inspection, not at the initial stage or in the middle of the process. Electrical testing is performed once the LED PCB has been soldered and cooled down at the regular temperature. If performed at earlier stages, assembly personnel won’t know how many more heat cycles the LED board undergoes. Consequently, testing will not be meaningful or valid. Photo Sources • Figure 1: Advanced Thermal Solutions, Inc. • Figure 2: • Figure 3:


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