L E T T E R
Xcell journal PUBLISHER
Mike Santarini mike.santarini@xilinx.com 408-626-5981
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Jacqueline Damian
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Scott Blair
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www.xilinx.com/xcell/ Xilinx, Inc. 2100 Logic Drive San Jose, CA 95124-3400 Phone: 408-559-7778 FAX: 408-879-4780 www.xilinx.com/xcell/ © 2013 Xilinx, Inc. All rights reserved. XILINX, the Xilinx Logo, and other designated brands included herein are trademarks of Xilinx, Inc. All other trademarks are the property of their respective owners. The articles, information, and other materials included in this issue are provided solely for the convenience of our readers. Xilinx makes no warranties, express, implied, statutory, or otherwise, and accepts no liability with respect to any such articles, information, or other materials or their use, and any use thereof is solely at the risk of the user. Any person or entity using such information in any way releases and waives any claim it might have against Xilinx for any loss, damage, or expense caused thereby.
F R O M
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P U B L I S H E R
Work Smarter With Xilinx All Programmable Solutions f you’ve checked out Xilinx’s home page lately, you’ve probably noticed that we have plunged full force into a new campaign touting “Smarter” systems. Inspired by what our customers have already been able to create with Xilinx devices, we are delivering tools today to help you create the Smarter technologies that will shape tomorrow. In the last two months, Xilinx has rolled out our Smarter Networks initiative, and now, as reflected in the cover story of this issue, our Smarter Vision program. In both cases, Xilinx not only offers devices that allow customers to create smarter systems, but the IP, tools and design environments to support those chips. In this issue, DSP specialist Chris Dick writes about how the wireless carriers are rapidly getting smarter in finding ways to increase the profitability of their next-generation networks. Gone are the days when carriers would just install a greater number of faster and more powerful basestations to increase bandwidth. Today they are adding intelligence and looking toward self-organizing network architectures to dynamically shift coverage to where it is needed most—working smarter, not harder, and raising profits while doing so. On another front, my cover story discusses a subject I find very fascinating: Smarter Vision. As you’ll read, the world of embedded vision has been growing by leaps and bounds, to the point where vision systems are becoming ubiquitous. Today you can find them in everything from gaming consoles to the car you drive to factories and hospitals. Even produce distributors are benefiting from embedded vision technology, which traditionally has paired FPGAs with standalone processors. But we at Xilinx think that with a silicon platform as powerful as the Zynq™-7000 All Programmable SoC, you’ll be able to create much more capable embedded vision systems—Smarter Vision systems—using one chip instead of two or three. To facilitate that effort, Xilinx is going the extra mile by offering the industry the broadest software development environment support and proliferating high-level synthesis technology through the Vivado™ HLS tool in our Vivado Design Suite. System architects can design vision algorithms in C/C++ and use Vivado HLS to create RTL versions. In doing so, they can see, for example, whether certain algorithms or parts of an algorithm would run better in the Zynq SoC’s processor system or in its FPGA fabric. In early April, Xilinx added even more Smarter Vision automation to the Vivado Design Suite in release 2013.1. Designers now can use a tool called IP Integrator to deliver the industry’s fastest time to integration. With this release of Vivado, we also announced our OpenCV cores library to help vision architects design more productively. In the initial release, Xilinx has provided more than 30 commonly used algorithms from the OpenCV library and created RTL versions that you can add to your design to get a jump on developing Smarter Vision systems. You can even use them to evaluate hardware platforms by running the functions on the Zynq SoC vs. other ARM+DSP and ARM+GPU-based hardware platforms. Jose Alvarez and Fernando Vallina discuss the OpenCV advantage on page 24. Finally, I’m happy to announce that an old friend from the trade press, Steve Leibson, the former editor-in-chief of the Microprocessor Report and EDN, recently joined Xilinx and has penned a comprehensive backgrounder on smarter wired and wireless networks and smarter data centers. Steve’s backgrounder goes into great depth on the trends in these markets and how Xilinx is helping customers address them with our Smarter Networking technology. You can download a PDF from http://www.xilinx.com/publications/ prod_mktg/smarter-networks-backgrounder.pdf. I hope this issue and associated resources will inspire you to take the next step and try out the Zynq SoC, if you haven’t already.
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Mike Santarini Publisher