TECH ARTICLE module rather than having to shift bits through every module just to read or write the bits you want. It also simplifies the API software because it doesn't have to remember and restore the state of all the unaffected modules while changing the state of just one.
The Microcontroller Firmware The microcontroller software performs a couple of relatively straight-forward functions: * It accepts USB packets from the PC containing the values for the TCK, TMS and TDI pins and applies them to the JTAG port. • It packages the bits output on the TDO pin into USB packets and sends them back to the PC.
The Python API An example of using the Python API to interact with an eight-bit adder is shown in Listing 1. Before executing this script, the FPGA has to be loaded with a bitstream containing the adder circuit and an attached HostIoToDut module with its ID # register set to 4.
Figure 3: Using Multiple HostIoToDut Modules
Listing 1: from xstools.xsdutio import * # Import funcs/classes for PC <=> FPGA link. from random import * # Import some random number generator routines. USB_ID = 0 # USB port index for the XuLA board connected to the host PC. ADDER_ID = 4 # This is the identifier for the adder in the FPGA. # Create an adder intfc obj with two 8-bit inputs, and 8-bit, 1-bit sum, carry outputs. adder = XsDutIo(xsusb_id=USB_ID, module_id=ADDER_ID, dut_input_widths=[8, 8],dut_output_widths=[8, 1]) # Test the adder by iterating through some random inputs. for i in range(0, 100): num1 = randint(0, 255) # Get a random,positive byte in the range [0, 255]. num2 = randint(0, 255) # Get another random, positive byte. (sum, carry) = adder.exec(num1, num2) # # Use the adder in the FPGA. final_sum = sum.unsigned + 256 * carry unsigned # Combine the sum and carry bit. print '%3d + %3d = %4d' % (num1, num2, final_sum), if final_sum == num1 + num2: # Compare Python result to FPGA's. print '==> CORRECT!' # Print this if the sums match. else: print '==> ERROR!!!' # Oops! Something's wrong with the adder.
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